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1 LTC1380/ltc1393 single-ended 8-channel/ differential 4-channel analog multiplexer with smbus interface v s (v) ? on resistance ( w ) 150 200 250 3 1167 g15 100 50 125 175 225 75 25 0 ? ? 1 ? 4 ? 0 2 5 v cc = 2.7v v ee = 0v t a = 25 c i d = 1ma v cc = 5v v ee = 0v v cc = 5v v ee = 5v on resistance vs v s 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 LTC1380 0.1 m f 15k 8 analog inputs 15k 0.1 m f ?v 5v analog output 1380/93 ta01 s0 s1 s2 s3 s4 s5 s6 s7 v cc scl sda a0 a1 gnd v ee d o smbus host scl sda LTC1380 single-ended 8-channel multiplexer typical applicatio n u the ltc ? 1380/ltc1393 are cmos analog multiplexers with smbus ? compatible digital interfaces. the LTC1380 is a single-ended 8-channel multiplexer, while the ltc1393 is a differential 4-channel multiplexer. the smbus digital inter- face requires only two wires (scl and sda). both the LTC1380 and the ltc1393 have four hard-wired smbus addresses, selectable with two external address pins. this allows four devices, each with a unique smbus address, to coexist on one system and for four devices to be synchro- nized with one stop bit. the supply current is typically 10 m a. both digital interface pins are smbus compatible over the full operating supply voltage range. the LTC1380 analog switches feature a typical r on of 35 w ( 5v supplies), typical switch leakage of 20pa and guaranteed break-before-make operation. charge injection is 1pc typical. the LTC1380/ltc1393 are available in 16-lead so and gn packages. operation is fully specified over the commercial and industrial temperature ranges. n micropower operation: supply current = 20 m a max n 2-wire smbus interface n single 2.7v to 5v supply operation n expandable to 32 single or 16 differential channels n guaranteed break-before-make n low r on : 35 w single ended/70 w differential n low charge injection: 20pc max n low leakage: 5na max n available in 16-lead so and gn packages features descriptio n u , ltc and lt are registered trademarks of linear technology corporation. smbus is a registered trademark of intel corporation. n data acquisition systems n process control n laptop computers n signal multiplexing/demultiplexing n analog-to-digital conversion systems applicatio n s u
2 LTC1380/ltc1393 absolute m axi m u m ratings w ww u (note 1) total supply voltage LTC1380 (v cc to v ee ) ......................................... 15v ltc1393 (v cc to gnd) ....................................... 15v analog input voltage LTC1380 ............................. v ee C 0.3v to v cc + 0.3v ltc1393 ................................... C 0.3v to v cc + 0.3v digital inputs .............................................C 0.3v to 15v LTC1380 (v cc to v ee ) .... (v ee C 0.3v) to (v ee + 15v) ltc1393 (v cc to gnd) .......................... C 0.3v to 15v maximum switch-on current .............................. 65ma power dissipation ............................................. 500mw operating ambient temperature range LTC1380c/ltc1393c ....................... 0 c t a 70 c LTC1380i/ltc1393i .................... C 40 c t a 85 c junction temperature ........................................... 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c package/order i n for m atio n w u u order part number order part number ltc1393cgn ltc1393cs ltc1393ign ltc1393is LTC1380cgn LTC1380cs LTC1380ign LTC1380is top view s package 16-lead plastic so gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 s0 s1 s2 s3 s4 s5 s6 s7 v cc scl sda a0 a1 gnd v ee d o t jmax = 125 c, q ja = 130 c/ w (gn) t jmax = 125 c, q ja = 100 c/ w (s) t jmax = 125 c, q ja = 130 c/ w (gn) t jmax = 125 c, q ja = 100 c/ w (s) top view s package 16-lead plastic so gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 s0 + s0 s1 + s1 s2 + s2 s3 + s3 v cc scl sda a0 a1 gnd d o d o + consult factory for military grade parts. electrical characteristics symbol parameter conditions min typ max units v analog analog signal range LTC1380 l v ee v cc v ltc1393 l 0v cc v r on on resistance lt1380: v cc = 5v, v ee = C 5v, 35 70 w v ee (v s , v d ) v cc , i d = 1ma l 120 w lt1393: v cc = 5v, 70 140 w 0v (v s , v d ) v cc , i d = 1ma l 200 w lt1380/ltc1393: v cc = 2.7v, v ee = 0v, 210 400 w 0v (v s , v d ) v cc , i d = 1ma l 600 w d r on vs v s v ee (v s , v d ) v cc , v cc = 5v 20 % r on vs temperature v cc = 5v 0.5 %/ c i leak off-channel or on-channel LTC1380: (v ee + 0.5v) (v s , v d ) (v cc C 0.5v) 0.05 5na switch leakage ltc1393: 0.5v (v s , v d ) (v cc C 0.5v) l 50 na (notes 2, 4)
3 LTC1380/ltc1393 electrical characteristics (notes 2, 4) the l denotes specifications which apply over the full operating temperature range. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: all current into device pins is positive; all current out of device pins is negative. all voltages are referenced to ground unless otherwise specified. all typicals are given for t a = 25 c, v cc = 5v (for both LTC1380 and ltc1393) and v ee = C 5v (LTC1380). note 3: these typical parameters are based on bench measurements and are not production tested. note 4: both scl and sda assume an external 15k pull-up resistor to a typical smbus host power supply v dd of 5v. note 5: typical curves with v ee = C 5v apply to the LTC1380. curves with v ee = 0v apply to both the LTC1380 and the ltc1393. note 6: these parameters are guaranteed by design and are not tested in production. symbol parameter conditions min typ max units v ih scl, sda input high voltage l 1.4 v v il scl, sda input low voltage l 0.6 v v ol sda output low voltage i sda = 3ma l 0.4 v v ah address input high voltage v cc = 5v l 2v v al address input low voltage v cc = 5v l 0.8 v i in scl, sda, address input current 0v v in v cc 1 m a i cc positive supply current v cc = 5v, all digital inputs at 5v l 10 20 m a i ee negative supply current LTC1380: v cc = 5v, v ee = C 5v, all digital inputs at 5v l C 0.1 C 5 m a c s input off capacitance (note 3) 3 pf c d output off capacitance (note 3) LTC1380 26 pf ltc1393 18 pf t on switch turn-on time from figure 1 LTC1380: v cc = 5v, v ee = C 5v l 850 1500 ns stop condition ltc1393: v cc = 5v l 850 1500 ns LTC1380/ltc1393: v cc = 2.7v, v ee = 0v l 1130 2000 ns t off switch turn-off time from figure 1 LTC1380: v cc = 5v, v ee = C 5v l 640 1200 ns stop condition ltc1393: v cc = 5v l 650 1200 ns LTC1380/ltc1393: v cc = 2.7v, v ee = 0v l 670 1200 ns t open break-before-make interval t on C t off l 75 210 ns oirr off-channel isolation figure 2, v s = 200mv p-p , r l = 1k, f = 100khz (note 3) C 65 db q inj charge injection figure 3, c l = 1000pf (note 3) l 1 20 pc smbus timing (note 6) f smb smbus operating frequency l 100 khz t buf bus free time between stop/start l 4.7 m s t hd:sta hold time after (repeated) start l 4.0 m s t su:sta repeated start setup time l 4.7 m s t su:sto stop condition setup time l 4.0 m s t hd:dat data hold time l 300 ns t su:dat data setup time l 250 ns t low clock low period l 4.7 m s t high clock high period l 4.0 m s t f scl/sda fall time time interval between 0.9v dd and (v ilmax C 0.15) l 300 ns t r scl/sda rise time time interval between (v ilmax C 0.15) l 1000 ns and (v ihmin + 0.15)
4 LTC1380/ltc1393 typical perfor a ce characteristics uw v s (v) 4.5 i s leakage (na) 0.010 2.5 0.5 0.5 4.5 1380/93 g04 0.008 0.006 0.004 0.002 0 0.002 0.004 0.006 0.008 0.010 3.5 ?.5 1.5 2.5 3.5 t a = 25 c v cc = 5v v ee = 5v v cc = 5v v ee = 0v v cc = 2.7v v ee = 0v off-channel output leakage vs temperature temperature ( c) ?0 1 10 1000 25 75 1380/93 g07 0.1 0.01 ?5 0 50 100 125 0.001 0.0001 100 i d leakage (na) v cc = 2.7v v ee = 0v v d = 1.35v v cc = 5v v ee = 5v v d = 0v v cc = 5v v ee = 0v v d = 2.5v off-channel input leakage vs temperature temperature ( c) 50 ?5 0.0001 i s leakage (na) 0.01 10 0 50 75 1380/93 g06 0.001 1 0.1 25 100 125 v cc = 5v v ee = 0v v s = 2.5v v cc = 5v v ee = 5v v s = 0v v cc = 2.7v v ee = 0v v s = 1.35v on-channel output leakage vs v d v d (v) 4.5 i d leakage (na) 0.010 2.5 0.5 0.5 4.5 1380/93 g05 0.008 0.006 0.004 0.002 0 0.002 0.004 0.006 0.008 0.010 3.5 ?.5 1.5 2.5 3.5 t a = 25 c v cc = 5v v ee = 5v v cc = 5v v ee = 0v v cc = 2.7v v ee = 0v temperature ( c) ?0 0 on resistance ( w ) 25 75 100 125 250 175 0 50 75 1380/93 g01 50 200 225 150 ?5 25 100 125 i d = 1ma v cc = 2.7v v ee = 0v v s = 1.35v v cc = 5v v ee = 0v v s = 2.5v v cc = 5v v ee = 5v v s = 0v on resistance vs temperature v s (v) 4.5 i s leakage (na) 0.0020 2.5 0.5 0.5 4.5 1380/93 g02 0.0018 0.0016 0.0014 0.0012 0.0010 0.0008 0.0006 0.0004 0.0002 0 3.5 ?.5 1.5 2.5 3.5 t a = 25 c v cc = 5v v ee = 5v v cc = 5v v ee = 0v v cc = 2.7v v ee = 0v v d (v) 4.5 i d leakage (na) 0.010 2.5 0.5 0.5 4.5 1380/93 g03 0.008 0.006 0.004 0.002 0 0.002 0.004 0.006 0.008 0.010 3.5 ?.5 1.5 2.5 3.5 t a = 25 c v cc = 5v v ee = 5v v cc = 2.7v v ee = 0v v cc = 5v v ee = 0v off-channel output leakage vs v d on-channel input leakage vs temperature temperature ( c) ?0 1 10 1000 25 75 1380/93 g08 0.1 0.01 ?5 0 50 100 125 0.001 0.0001 100 i s leakage (na) v cc = 5v v ee = 5v v s = 0v v cc = 5v v ee = 0v v s = 2.5v v cc = 2.7v v ee = 0v v s = 1.35v temperature ( c) ?0 1 10 1000 25 75 1380/93 g09 0.1 0.01 ?5 0 50 100 125 0.001 0.0001 100 i d leakage (na) v cc = 5v v ee = 5v v d = 0v v cc = 5v v ee = 0v v d = 2.5v v cc = 2.7v v ee = 0v v d = 1.35v off-channel input leakage vs v s on-channel input leakage vs v s on-channel output leakage vs temperature (note 5)
5 LTC1380/ltc1393 typical perfor a ce characteristics uw off time vs temperature q inj vs v c (figure 3) on time vs temperature temperature ( c) ?0 on time (ns) 1400 25 1380/93 g11 800 400 ?5 0 50 200 0 1600 1200 1000 600 75 100 125 v cc = 2.7v v ee = 0v v s = 1.35v v cc = 5v v ee = 0v v s = 2.5v v cc = 5v v ee = 5v v s = 0v v c (v) ? q inj (pc) 3.0 4.0 5.0 3 1380/93 g12 2.0 1.0 2.5 3.5 4.5 1.5 0.5 0 ? ? 1 ? 4 ? 0 2 5 t a = 25 c v cc = 5v v ee = 5v v cc = 2.7v v ee = 0v v cc = 5v v ee = 0v temperature ( c) ?0 off time (ns) 700 25 1380/93 g10 400 200 ?5 0 50 100 0 800 600 500 300 75 100 125 v cc = 5v v ee = 5v v s = 0v v cc = 2.7v v ee = 0v v s = 1.35v v cc = 5v v ee = 0v v s = 2.5v q inj vs temperature (figure 3) temperature ( c) ?0 0 ? q inj ? (pc) 0.2 0.6 0.8 1.0 2.0 1.4 0 50 75 1380/93 g13 0.4 1.6 1.8 1.2 ?5 25 100 125 v cc = 5v v ee = 5v v s = 0v v cc = 2.7v v ee = 0v v s = 1.35v v cc = 5v v ee = 0v v s = 2.5v off-channel isolation vs input common mode voltage (figure 2) i cc vs temperature temperature ( c) ?0 0 i cc ( m a) 1 3 4 5 10 7 0 50 75 1380/93 g15 2 8 9 6 ?5 25 100 125 v cc = 5v v ee = 5v v cc = 2.7v v ee = 0v v cc = 5v v ee = 0v temperature ( c) ?0 100 i ee (na) ?0 ?0 ?0 ?0 0 ?0 0 50 75 1380/93 g16 ?0 ?0 ?0 ?0 ?5 25 100 125 v cc = 5v v ee = 5v v s = 0v i ee vs temperature (note 5) v c (v) ? oirr (db) ?5 ?3 ?4 ?2 ?1 ?0 ?9 ?8 ?7 ?6 ?5 3 1380/93 g14 ? 1 1 5 2 ? 2 0 4 v cc = 5v v ee = 5v v cc = 5v v ee = 0v v cc = 2.7v v ee = 0v t a = 25 c v s = 200mv p-p , 100khz r l = 1k
6 LTC1380/ltc1393 pi n fu n ctio n s uuu s0 to s7/s0 to s3 (pin 1 to pin 8): single-ended analog multiplexer inputs (s0 to s7) for the LTC1380. differential analog multiplexer inputs (s0 to s3 ) for the ltc1393. d o /d o + (pin 9): analog multiplexer output for the LTC1380. positive differential analog multiplexer output for the ltc1393. v ee /d o C (pin 10): negative supply pin for the LTC1380. negative differential multiplexer output for the ltc1393. for the LTC1380, v ee should be bypassed to gnd with a 0.1 m f ceramic capacitor when operating from split sup- plies or connected to gnd for single supply operation. gnd (pin 11): ground pin. a1, ao (pin 12, pin 13): address selection pins. tie these two pins to either v cc or gnd to select one of four possible addresses to which the LTC1380/ltc1393 will respond. sda (pin 14): smbus bidirectional digital input/output pin. this pin has an open-drain output and requires a pull- up resistor or current source to the positive supply for normal operation. data is shifted into and acknowledged by the LTC1380/ltc1393 using this pin. scl (pin 15): smbus clock input. sda data is shifted in at rising edges of this clock during data transfer. v cc (pin 16): positive supply pin. this pin should be bypassed to gnd with a 0.1 m f ceramic capacitor. block diagra w address comparator smbus state machine 4-bit latch and decoder shift register hold stop 1380/93 bd sda a0 a1 scl multiplexer switches analog output(s) (LTC1380: d o ) (ltc1393: d o ) analog inputs (LTC1380: s0 to s7) (ltc1393: s0 to s3 )
7 LTC1380/ltc1393 test circuits scl sd sda r l 1k c l 35pf v d v c 1/2 ?(v cc + v ee ) scl sda 1v LTC1380 1.5v stop condition with en = 1 stop condition with en = 0 scl 0.4v 1.5v 1v 20% t r < 20ns, t f < 20ns t on sda 0.4v v d v c 1v 80% 1380/93 f01 t off figure 3. charge injection test scl sd sda c l 1000pf charge injection d q = d v d ?c l v d scl sda v c LTC1380 1.5v stop condition with en = 1 stop condition with en = 0 scl 0.4v 1.5v sda 0.4v v d v c d v d 1380/93 f03 d v d scl sd sda r l 1k v d v c2 1/2 ?(v cc + v ee ) oirr = 20log 10 (v d /v s ) where v s and v d are the ac voltage components at s and d v c1 1/2 ?(v cc + v ee ) v s 200mv p-p 100khz scl sda LTC1380 1380/93 f02 figure 2. off-channel isolation (oirr) test figure 1. switch t on /t off propagation delay from smbus stop condition
8 LTC1380/ltc1393 applicatio n s i n for m atio n wu u u ti i g diagra u w w sda from host sda from LTC1380/ltc1393 scl d o x 0 a0 a1 0 0 11* *0 for LTC1380, 1 for ltc1393 x x x en c2 c1 c0 s t su:sta s p t hd:dat t su:dat t hd:sta t r t f t low t high t buf t su:sto t off t on t open address byte command byte theory of operation the LTC1380/ltc1393 are analog input multiplexers with an smbus digital interface. the LTC1380 is a single-ended 8-to-1 multiplexer; the ltc1393 is a differential 4-to-1 mulitplexer. the LTC1380 operates on either bipolar or unipolar supplies, the ltc1393 operates on a single supply. the minimum v cc supply for the LTC1380/ltc1393 is 2.7v. the maximum supply voltage (v cc to v ee for the LTC1380, v cc for the ltc1393) should not exceed 14v. the multiplexer switches operate within the entire power supply range. the LTC1380 v cc and v ee supplies can be offset such as 2.7v/C11v and 11v/C 3v. serial interface the LTC1380/ltc1393 serial interface supports smbus send byte protocol as shown below with two interface signals, scl and sda. a send byte protocol is initiated by the smbus host with a start bit followed by a 7-bit address code and a write bit. each slave compares the address code with its address. the send byte write bit is low. the selected slaves then reply with an acknowledge bit by pulling the sda line low. next, the host sends an 8-bit command byte. when the selected slave receives the whole command byte, it ac- knowledges and retains the command byte in the shift register. the host can terminate the serial transfer with a stop bit or communicate with another slave device with a repeat start. when a repeat start occurs but the slave is not selected, the command byte data is kept in the shift register but the multiplexer control is not updated. the multiplexer control latches the new command from the shift register on the first stop bit after a successful com- mand byte transfer. this allows the host to synchronize several slave devices with a single stop bit. a1 and a0 select one of the four possible LTC1380/ltc1393 ad- dresses as shown in table 1. this allows up to four similar devices to share the same smbus, expanding the multi- plexer to 32 single-ended channels with the LTC1380; 16 differential channels with the ltc1393. the first stop bit after a successful send byte transfer will latch in the multiplexer control bits (en, c2, c1 and c0) and initiate a break-before-make sequence. s10010a1a0w axxxxenc2c1c0ap LTC1380 send byte protocol s1001 address byte s = smbus start bit p = smbus stop bit (the first stop bit after a successful command byte updates the multiplexer control latch) a = acknowledge bit from LTC1380/ltc1393 w = write command bit a1, a0 = address bits en, c2, c1, c0 = multiplexer control bits 1a1a0waxxxxenc2c1c0ap ltc1393 send byte protocol command byte
9 LTC1380/ltc1393 applicatio n s i n for m atio n wu u u table 1. LTC1380/ltc1393 address selection a1 a0 LTC1380 ltc1393 0 0 90h 98h 0 1 92h 9ah 1 0 94h 9ch 1 1 96h 9eh scl is the synchronizing clock generated by the host. sda is the bidirectional data transfer between the host and the slave. the host initiates a start bit by dropping the sda line from high to low while the scl is high. the stop bit is initiated by changing the sda line from low to high while scl is high. all address, command and acknowledge signals must be valid and should not change while scl is high. the acknowledge bit signals to the host the accep- tance of a correct address byte or the command byte. at v cc supply above 2.7v, the scl and sda input thresh- old is typically 1v with an input hysteresis of 100mv. the typical scl and sda lines have either a resistive or current source pull-up at the host. the LTC1380/ltc1393 have an open-drain nmos transistor at the sda pin to sink 3ma below 0.4v during the slave acknowledge sequence. the address selection input a1 and a0 are ttl compatible at v cc = 5v. both the LTC1380 and ltc1393 are compatible with the philips/signetics i 2 c bus interface. this 1v threshold for sca and sda should not pose an operational problem with i 2 c applications. the multiplexer switches are selected as shown in table 2. both the LTC1380 and the ltc1393 have an enable bit (en). a low disables all switches while a high enables the selected switch as programmed by bits c2, c1 and c0. a stop bit after a successful send byte sequence for LTC1380/ ltc1393 will disable all switches before the new selected switch is connected. table 2. multiplexer control bits truth table LTC1380 d o ltc1393 d o + , d o C en c2 c1 c0 channel status channel status 0xxx all off all off 1000 s0 s0 + , s0 C 1001 s1 1010 s2 s1 + , s1 C 1011 s3 1100 s4 s2 + , s2 C 1101 s5 1110 s6 s3 + , s3 C 1111 s7 typical applicatio n s u simplified ltc1393 application 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1393 0.1 m f 15k 4 differential analog inputs 15k 5v differential analog outputs 1380/93 ta03 s0 + s0 s1 + s1 s2 + s2 s3 + s3 v cc scl sda a0 a1 gnd d o d o + smbus host scl sda
10 LTC1380/ltc1393 typical applicatio n s u 16-channel multiplexer with buffer 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 LTC1380 0.1 m f 15k 16 analog inputs 15k 5v 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1380/93 ta04 s0 s1 s2 s3 s4 s5 s6 s7 v cc scl sda a0 a1 gnd v ee d o LTC1380 s0 s1 s2 s3 s4 s5 s6 s7 v cc scl sda a0 a1 gnd v ee d o 0.1 m f v out ?v + lt1351 smbus host scl sda programmable gain amplifier 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 LTC1380 0.1 m f 15k 15k 0.1 m f ?v v out analog input 5v r0 r1 r2 r3 r4 r5 r6 r7 r f 1380/93 ta05 s0 s1 s2 s3 s4 s5 s6 s7 v cc scl sda a0 a1 gnd v ee d o + lt1055 smbus host scl sda
11 LTC1380/ltc1393 package descriptio n u dimensions in inches (millimeters) unless otherwise noted. gn package 16-lead plastic ssop (narrow 0.150) (ltc dwg # 05-08-1641) gn16 (ssop) 1197 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side 12 3 4 5 6 7 8 0.229 ?0.244 (5.817 ?6.198) 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.189 ?0.196* (4.801 ?4.978) 12 11 10 9 0.016 ?0.050 (0.406 ?1.270) 0.015 0.004 (0.38 0.10) 45 0 ?8 typ 0.007 ?0.0098 (0.178 ?0.249) 0.053 ?0.068 (1.351 ?1.727) 0.008 ?0.012 (0.203 ?0.305) 0.004 ?0.0098 (0.102 ?0.249) 0.025 (0.635) bsc 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 1 2 3 4 5 6 7 8 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 s16 0695 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s package 16-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
12 LTC1380/ltc1393 138093f lt/gp 0398 4k ? printed in usa ? linear technology corporation 1998 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 l (408) 432-1900 fax: (408) 434-0507 l telex: 499-3977 l www.linear-tech.com typical applicatio n u 8 differential channel multiplexer with a/d converter part number description comments ltc201a/ltc202/ micropower, low charge injection, quad cmos each channel is independently controlled ltc203 analog switches with data latches ltc221/ltc222 micropower, low charge injection, quad cmos analog switches parallel controlled with data latches ltc1390/ltc1391 8-channel, analog multiplexer with serial interface 3v to 5v in 16-pin so and pdip ltc1623 high side switch with smbus interface regulated on-board charge pump drives external n-channel mosfets related parts 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1393 0.1 m f 15k 8 differential analog inputs 15k 5v s0 + s0 s1 + s1 s2 + s2 s3 + s3 v cc scl sda a0 a1 gnd d o d o + 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1393 1380/93 ta06 s0 + s0 s1 + s1 s2 + s2 s3 + s3 v cc scl sda a0 a1 gnd d o d o + 1 2 3 4 8 7 6 5 v ref + in in gnd serial clock in serial clock out cs v cc clk d out cs/shdn ltc1286 4.7 m f smbus host scl sda

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